This invention relates to a bias generating circuit, or a DC voltage reducing circuit, suitable for an internal low voltage power source in a large-scale integrated circuit (IC) device.
In general, since digital electronic apparatuses composed of many MOS IC devices operate with TTL logic signals, the MOS IC devices are powered by using 5-volt power supply. On the other hand, MOS transistors in the MOS IC devices are remarkably being miniaturized with years. However, in the case such miniaturized MOS transistors are operated with the 5-volt power supply, they seriously suffer from hot electron and impact ionization phenomena, and the short-channel effect.
An advantageous method of precluding these adverse effects is to lower the power supply voltage. However, because system designers do not want any complexity in system design considerations and an increased number of power supplies, the 5-volt power supply has been used as a standard power source without change.
Therefore, in MOS IC devices, it is desired that the input and output circuits therein are powered on 5 volts to interface external logic circuits, while internal logic circuits are powered on a lower DC voltage (for example, 2.5 to 3 volts) of a magnitude that will not bring about the aforementioned physical phenomena.